10-to-4 Line Priority Encoder

The 74HC147N is a high-speed Si-gate CMOS device and is pin compatible with low power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard no. 7A.

The 74HC147N 9-input priority encoders accept data from nine active LOW inputs (A0 to A8) and provide a binary representation on the four active LOW outputs (Y0 to Y3). A priority is assigned to each input so that when two or more inputs are simultaneously active, the input with the highest priority is represented on the output, with input line A8 having the highest priority.

The device provides the 10-line to 4-line priority encoding function by use of the implied decimal “zero”. The “zero” is encoded when all nine data inputs are HIGH, forcing all four outputs HIGH.